Fundamentals of digital logic design. Boolean logic, MUXes, DEMUXes, decoders, encoders, comparators, arithmetic blocks, flip-flops, counters, registers, RAMs/ROMs, PLDs and FPGAs. Design of a simple computer CPU. Schematic capture and Hardware Description Language (HDL), particularly, Verilog.Prerequisite: EE98 and EE97 with a C or better. Allowed Declared Major: Electrical Engineering.Misc/Lab: Lecture 3 hours/lab 3 hours. Class Notes: IG - Students must also register in a lab section. Enrollment Requirements: Prerequisite: Allowed Declared Major: Electrical Engineering.
Fall 2019, Spring 2019, Fall 2018, Spring 2018, Fall 2017