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ESE 532 - Ystem-On-A-Chip Arch

Description
Motivation, design, programming, optimization, and use of modern System-on-a-Chip (SoC) architectures. Hands-on coverage of the breadth of computer engineering within the context of SoC platforms from gates to application software, including on-chip memories and communication networks, I/O interfacing, RTL design of accelerators, processors, concurrency, firmware and OS/infrastructure software. Formulating parallel decompositions, hardware and software solutions, hardware/software tradeoffs, and hardware/software codesign. Attention to real-time requirements.
Recent Professors
A. Dehon
Recent Semesters
Fall 2021, Fall 2020, Fall 2019, Spring 2017
Former Title
System-On-A-Chip Arch
Class Size
30-42
Credits
1
Schedule Planner
Add ESE 532 to your schedule
Usually Offered
MW (1 hour 30 minutes)